1. Field of the Invention
The present invention relates to a method of manufacturing a solid-state image pickup element having a plurality of photoelectric conversion elements formed within a semiconductor substrate, and the solid-state image pickup element.
2. Description of the Related Art
The development of a so-called back-surface irradiation type CMOS (Complementary Metal Oxide Semiconductor) sensor with an objective of maximizing an aperture area of a photodiode (FD) has recently been under way. Specifically, first, for example a φ8-inch SOI (Silicon On Insulator) substrate (device substrate) in which a CMOS image sensor is formed is laminated to a silicon (Si) substrate (supporting substrate) of a same size as the SOI substrate. The side of the SOI substrate is ground and etched, and merely a Si active layer is left in the SOI substrate (back surface transfer).
Then, a color filter (OCCF) and an on-chip lens (OCL) are formed on the transferred active layer, thereby a back-surface irradiation type CMOS sensor is completed, which ultimately has a photodiode (FD) located in an upper surface and a wiring layer located in a lower surface.
As a method of manufacturing the above-described solid-state image pickup element, the inventor of the present application et al. have disclosed a substrate laminating method using benzocyclobutene (BCB) as a thermosetting adhesive for laminating the device substrate and the supporting substrate to each other (Japanese Patent Laid-Open No. 2005-285988). A concrete lamination is performed under the following conditions.
A device substrate (wafer) on which an adhesive layer is formed and a supporting substrate (wafer) are superimposed on each other in a decompressed atmosphere, and are then heated to a curing temperature (200° C. to 350° C.) of the adhesive to be laminated to each other while a pressure is applied to both the wafers. This laminating method has an advantage of being able to perform curing at a temperature lower than a degrading temperature of 450° C. of a wiring layer made of a material having a low heat resistance (for example Al or Cu) formed on the wafer.
Other wafer laminating methods using an adhesive include techniques disclosed in Japanese Patent Laid-Open Nos. Hei 5-291217 and Hei 10-135386. Japanese Patent Laid-Open No. Hei 5-291217 discloses techniques that use a thermoplastic resin for wafer lamination and which perform the lamination after lowering the viscosity of the resin by heating. Japanese Patent Laid-Open No. Hei 10-135386 discloses techniques that laminate a wafer and a radiation plate to each other using an adhesive and then separate the wafer into individual chips.